Tesla
Sr. Process Integration Engineer (Terafab)
Skills
5 months ago
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Important information
Contract type:
Permanent
Location:
Hsinchu, North District, Hsinchu City, Taiwan
Work mode:
Onsite
Published on:
10 August 2026
What they need
What to Expect
We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot.
As a Process Integration Engineer, you will own the integration of unit processes into complete fabrication flows, driving yield, reliability, and manufacturability from early concept through high-volume production. This is a ground-level role at one of the most ambitious fab programs in the world.
What You’ll Do
Own end-to-end process integration from design-rule development through full-flow execution and HVM readiness
Define integration schemes for advanced logic and memory for leading edge nodes
Partner with unit process teams to define process windows and integration constraints
Develop and maintain process flow documentation, traveler specifications, and integration decision logs
Lead root cause analysis and systematic yield improvement across full-flow integration splits
Interface with equipment, metrology, and data teams to establish inline monitoring and SPC at key integration checkpoints
Collaborate with design and EDA teams to validate process-design interactions and close PDK parameters
Support technology transfer and ramp readiness as Terafab scales toward production What You’ll Bring
Degree in Electrical Engineering, Materials Science, Chemical Engineering, or equivalent experience
5+ years of engineering experience in a high-volume semiconductor fab (logic, memory, or foundry)
Deep knowledge of at least one advanced node and its integration tradeoffs
Hands-on experience with full-flow integration splits, wafer-level experiments, and yield analysis
Proficiency with statistical tools for Design of Experiments, SPC, and process characterization
Experience with modern transistor architecture, high-NA EUV, or backside power delivery integration
Familiarity with heterogeneous integration or advanced packaging flows
Experience standing up a new process flow from scratch in a greenfield environment
Demonstrated ability to drive cross-functional alignment across unit process, equipment, and design teams
Ability to travel internationally (10%)
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