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Sr Staff Engineer- Dft

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Sr Staff Engineer- Dft

Qualcomm

Sr Staff Engineer- Dft

Skills

Git

2 months ago

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Important information


Contract type:

Permanent

Location:

Chennai, Tamil Nadu, India

Work mode:

Onsite

Published on:

25 August 2026

What they need


Company: Qualcomm India Private Limited

Job Area: Engineering Group, Hardware Engineering

Job Summary

  • Interface with design team to ensure DFT design rules and coverages are met.
  • Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.
  • MBIST verification (including repair), test pattern generation through Mentor tool.
  • ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
  • Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.
  • Responsible for supporting post silicon debug effort, issue resolution.
  • Responsible for Diagnostic Tool generation for ATPG, MBIST and bring-up on ATE.
  • Developing, enhancing and maintaining scripts as necessary
  • Minimum of 6-8 years experience in ASIC/DFT simulation and Silicon validation.
  • Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement.
  • In-depth knowledge and hands-on experience in ATPG - coverage analysis.
  • In-depth knowledge of Memory verification, repair and failure root-cause analysis.
  • Experience with any of these tools is required.
  • ATPG - TestKompress
  • MBIST - Mentor ETVerify
  • Simulation - VCS (preferred), ModelSim.
  • Expertise in scripting languages such as Perl, shell, etc. is an added advantage.
  • Ability to work in an international team, dynamic environment with good communication skills.
  • Ability to learn and adapt to new tools, methodologies.
  • Ability to do multi-tasking work on several high priority designs in parallel.

Minimum Qualifications

Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 5+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Engineering, Information Systems, or related field and 4+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Engineering, Information Systems, or related field and 3+ years of Hardware Engineering or related work experience.

10+ yrs of experience in DFT/ATPG/BIST

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