Sr System Performance Engineer

Job highlights

• Apply AI / ML and data-driven methods to analyze silicon characterization and HW telemetry data,identify anomalies and trends,accelerate controller tuning and improve debug as well as silicon validation execution efficiency. What we need to See: . B Tech or M Tech in Electronics Engineering stream
• Very good problem solving and hardware debugging skills

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our lifes work to amplify human imagination and intelligence. Make the choice to join us today!

As part of the Silicon Solutions Team, we architect and deliver groundbreaking solutions for productizing NVIDIAs chips into consumer, professional, server, mobile, and automotive markets. Silicon characterization, correlation to arch & design expectations, finalize product specifications, develop productization techniques and infrastructure around it are part of our responsibilities. Dealing with challenges of the latest process node technologies is also part of the work. Join this dynamic team as a Senior System Perf Engineer, and help craft the future of computing in Bengaluru.

What youll be doing:

• Lead the productization of Performance controllers from pre-silicon planning through bring-up, tuning, validation, and production.
• Collaborate with architecture, design, firmware, and software teams to define controller requirements & features , identify improvements and translate new capabilities into production-ready solutions.
• Characterize and tune controller behaviour across workloads, operating conditions, silicon variation, and product power and thermal limits. Maximize the perf and Perf/Watt with-in architectural bottlenecks & limitations, Power/Thermal system limits to provide best customer experience for the products
• Correlate silicon behaviour with pre-silicon expectations, debug & resolve complex problems during bring up and final closed loop performance stage involving silicon HW, firmware, software, power delivery network, system thermals etc.
• Apply AI/ML and data-driven methods to analyze silicon characterization and HW telemetry data, identify anomalies and trends, accelerate controller tuning and improve debug as well as silicon validation execution efficiency.

What we need to See:

• B. Tech or M. Tech in Electronics Engineering stream.
• At least 5+ years of proven experience in silicon validation, system level design, and power/performance optimization.
• Strong understanding of aspects related to silicon power and performance, technology node impacts, Hardware and Software interactions at system level.
• Hands-on experience with silicon bring up, validation and productization
• Good HW architectural understanding and orientation
• Very good problem solving and hardware debugging skills.
• Strong good data analysis and logical reasoning skills.
• Strong familiarity with HW lab environment.
• Must be a great teammate and ready to collaborate with global teams from diverse cultural backgrounds in a high energy environment.

Ways to stand out from the crowd:

• Extensive background in DVFS, voltage/frequency management, HW telemetries, Performance throttling, silicon protection mechanisms on advanced ASIC/SoC products.
• Contributions that improved controller behaviour, silicon performance, power efficiency, thermal management, bring-up/productization methodologies.
• Experience connecting controller behaviour across simulation, silicon, firmware, and system-level measurements and converting findings into production tuning.
• Experience applying AI/ML to engineering workflows, such as controller tuning, characterization analytics, anomaly detection, or debug assistants deployed beyond personal use.

With every new architecture and process node, balancing performance against power and thermal limits becomes tougher. Our controllers are at the forefront of this issue: drawing out the performance the silicon was crafted to achieve while shielding it when workloads push its limits. If you like understanding dynamic silicon behaviour, addressing hardware-software challenges, and influencing NVIDIA products at scale, wed love to connect!

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