Sr. Verif Engineer/Lead Verif Engineer

Generic Job Description (not Job Level specific): The Digital Verification Engineer / Architect is responsible for defining Design Verification strategy, plan and implement it for a IP, sub-system or IC level. Responsible for executing Digital verification to guarantee no “functional” fault exist, according to Specifications (Test cases) defined by product architects. Author of the Verification-specific documentation for internal and external use. Can be responsible for development of models or verification environment required specifically for Digital functional verification.

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