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Staff Engineer , Analog

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Staff Engineer , Analog

Signitude

Staff Engineer , Analog

Skills

NodeIOS

2 years ago

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Important information


Contract type:

Permanent

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

13 October 2026

What they need


Job highlights

  • . B Tech /BE / ME/M Tech in Electronics / Electrical Engineering or related fields with 5+ years of relevant hands-on experience
  • Experience with advanced process / FinFET is a plus

Staff Engineer, Analog

Location: Bangalore

Key Responsibilities

  • Developing low-power, high-performance analog circuits, including OpAmp, Comparators, Bandgap References, LDOs, Capless LDO, ADCs, DACs, PLL, DLL, Switching Regulator, High Speed IOs, DDR in advanced process nodes.
  • Defining circuit implementation architecture based on specifications, creating transistor-level designs, and collaborating with analog layout designers for optimization.
  • Creating and maintaining documentation for designs, including specifications, test plans, usage guidelines, and limitations.
  • Collaborating with system architects, the analog design team, and the DV (Design Verification) team for DV modeling and digital top verification.
  • Mentoring junior designers and sharing best practices to enhance design performance and productivity.

Requirements :

  • B. Tech /BE/ME/M Tech in Electronics/Electrical Engineering or related fields with 5+ years of relevant hands-on experience.
  • Strong experience in analog and mixed-signal circuit design and/or architecture. Experience with advanced process/FinFET is a plus.
  • Understanding of device basics and physics, with an understanding of the following:
  • High speed Driver and Receiver designs, PLL design with solid system understanding
  • Hands-on experience of Sub block design of Current mirrors, bandgap reference, Opamp, amplifiers with small-signal analysis of several topologies.
  • Experience in ADC/DAC/Regulator or High Speed SerDes circuit design
  • Good knowledge of devices, circuits, and EDA tools (schematic, layout, simulator, RC extraction, etc.), considering trade-offs among performance, power consumption, die area, and reliability.
  • Basic knowledge of the following layouts: antenna checks, antenna failure, latchup issues, ESD constraints, and layout rules, ERC related checks, matching, cross talk, coupling, shielding, guard ring usage, LEF generation, .lib characterization, extraction setup, DRC LVS runs switch knowledge, IR drop requirements, EM issues, parasitic matching, parasitic reduction techniques, and static and dynamic IR analysis
  • Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
  • Excellent written and verbal communication skills.

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