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Staff Layout Engineer

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Onsite

Staff Layout Engineer

Xinyx Design Consultancy & Services, Inc.

Staff Layout Engineer

Skills

NodeProcess Improvement

4 months ago

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Important information


Contract type:

Permanent

Location:

Manila, Metro Manila, Philippines

Work mode:

Onsite

Published on:

7 August 2026

What they need


A highly autonomous engineering lead with 8–10 years of deep expertise in full-scale IC layout design and sign-off verification from cell level up to complex PHY/CHIP levels. This role is defined by absolute technical independence, deep DRM expertise, and a mandate to innovate Best-Known Methods (BKMs) and project workflows. Beyond technical mastery, this professional drives cross-functional team success by managing client and teams, complex tasks, challenging legacy workflows, mentoring talent, and executing post-mortems to ensure flawless silicon delivery. End-to-End Layout & Physical Verification Sign-Off

  • Unsupervised Hierarchical Execution: Autonomously design, implement, and verify layouts scaling seamlessly from unit cells and blocks up to complex MACRO, PHY, and full top-level CHIP integrations.
  • Rigorous Quality & Waiver Control: Independently run advanced physical verification flows, rigorously double-checking results, authorizing and documenting confirmed error waivers, and generating comprehensive documentation.
  • Architectural Ownership: Maintain and actively enhance the mastery of assigned architectures, utilizing deep Design Rule Manual (DRM) knowledge across various process nodes.

Workflow Innovation & Process Improvement

  • BKM Advancement: Apply mastery of layout guidelines across diverse process technologies to deliver high-quality layouts on time, while continuously optimizing and improving "Best-Known Methods" (BKMs).
  • Strategic Optimization: Independently develop, prototype, and implement test cases to uncover optimal technical solutions in accelerated timeframes, while driving overall project improvement plans.

Cross-Group Leadership & Project Execution

  • Cross-Functional Management: Manage and lead engineering tasks, specialized working groups, or full scale projects both within the current group and across other organizational teams.
  • Lifecycle Efficiency: Drive the end-to-end task pipeline, executing precise task assessments, strategic resource delegation, real-time tracking, and final quality review/submission.
  • Challenging the Status Quo: Proactively question and propose structural developments for existing design flows, engineering documentation, and methodologies to safeguard long-term operational success.
  • Post-Mortem & Preventative Action: Initiate project post-mortems, tracking action items to close-out while engineering robust countermeasures to continuously elevate future project delivery.

Training & Personnel Development

  • Comprehensive Mentorship: Propose, design, deliver, and evolve both technical training curriculum (coaching/mentoring) and soft skills/personal development programs for emerging leaders and team optimization.

Meta Competencies

  • Uncompromising Technical Independence: The proven ability to take a design from initial concept to full tape-out verification sign-off without needing external engineering supervision.
  • Systemic Innovation (BKM Champion): A natural orientation toward looking at standard engineering workflows and actively finding ways to optimize, automate, or rewrite them for faster turnaround times.
  • Constructive Change Agency: The confidence and analytical weight required to challenge legacy documentation and status-quo frameworks across different business groups to build better long-term scalability.
  • Dual-Engine Leadership: Equal parts technical visionary (coaching engineering logic and architecture) and people strategist (cultivating soft skills, building client relationships, and developing human capital).

​

Requirements:

  • Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, or a related field, with a specialization in Integrated Circuit (IC) design.
  • 8–10 years of relevant, hands-on experience in analog/mixed-signal or digital IC layout design and full-chip physical verification

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