Staff/ Senior Engineer Package Technology

Package Technology Engineer

Key Responsibilities

In your new role, you will:

• Drive Technology Integration activities to ensure the package fulfills requirements in terms of process interaction.
• Perform PBC and TPC assessments and drive Package Technology DFMEA.
• Own Risk Interaction assessment and mitigation work packages.
• Drive pre-development for new chip technology.
• Integrate unit processes (BOM and Process) and new chip technology into the package platform, including risk assessment, process interaction studies, and process flow.
• Provide technical guidance and assistance to projects as needed.
• Drive 8D/problem solving for interaction issues.
• Work closely with FE on FE/BE interaction and integration topics.
• Assess the impact of design rules on inter-process interaction.

Requirements

You are best equipped for this role if you have:

• Minimum Bachelor’s Degree in Engineering, such as Semiconductor Technology, Microelectronics, Automation, Mechanical, Electrical, Electronics or Physics.
• At least 7 years of relevant working experience in an IC/semiconductor environment.
• Strong knowledge of FE/BE interaction and BE/BE interaction.
• Experience with 8D & T6s methodology.
• Knowledge of DFMEA/PFMEA.
• Knowledge of internal package analysis and first-level reliability.
• Strong assembly process knowledge and understanding of surface properties.
• Experience with DOE & Comparative method.