SystemC/TLM Modeling Engineer (VDK Virtual Platform)

• Develop functional IP models in SystemC/TLM to enable software left-shift 2. Design clean TLM interfaces and connectivity for reusable modeling 3. Integrate IP models into a Virtual SoC (vSOC) and support system bring-up 4. Build platform-level tests and regression to validate correctness 5. Improve productivity with tooling and CI/CD automation

Main Requirements and Qualifications

• 1. Strong C/C++ skills (modern C++ preferred).
• 2. Hands-on experience with SystemC and/or TLM-2.0 (LT modeling is acceptable; AT is a plus).
• 3. Understanding of SoC/IP concepts: memory-mapped I/O, interrupts, DMA, register maps, state machines.
• 4. Solid debugging skills (gdb, logs/traces, root-cause analysis).