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Technical Lead - FPGA Verification (DO-254)

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Onsite

Technical Lead - FPGA Verification (DO-254)

Thales

Technical Lead - FPGA Verification (DO-254)

Skills

PythonGitAIRisk Management

2 months ago

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Important information


Contract type:

Permanent

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

2 September 2026

What they need


Position Overview

The Thales India Engineering Competency Center (ECCi) is seeking a Hands-on Technical Lead for FPGA IVV. This is a dual-impact role: you will act as a player and a technical coach to elevate the team's skills while remaining directly involved in the execution of complex verification activities to meet the DO-254 excellence.

Qualifications

Experience: 10+ years in FPGA Verification.

Industry: Aerospace or Defense background would be an added advantage.

Education: B.Tech/B.E or M.Tech/Masters in Electronics & Communication

Required Skills:

Key Responsibilities:

Strategic Coaching & Mentorship

  • Technical Guidance: Provide daily coaching to the engineering team adhering to the verification best practices and advanced debugging techniques.
  • Skill Uplift: Adoption of latest tools, use of AI.
  • Best Practices: Establish and maintain high-quality coding standards for VHDL and documentation for DO-254.

Operational Execution

  • Environment Development: Directly architect and code critical VHDL environment including BFMs/Models and complex test scenarios.
  • Complex Interfaces Validation: Experience in verification of communication interfaces and bus standards (Example: AXI4, SPI, PCIe, UART, ARINC 818/664 )
  • Problem Solving: Take the lead on the most challenging technical bottlenecks, from simulation mismatches to physical hardware-software integration issues.

Certification & Delivery (DO-254)

  • End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B), ensuring 100% traceability between requirements and test results.
  • Artifact Production: Hands-on drafting and review of critical certification documents (Hardware Requirement Specification, Hardware Verification Test procedure & Results document, etc.)
  • Schedule & Risk: Lead technical estimation, planning, and risk mitigation for the IVV scope.

Critical Competencies

  1. Expert VHDL (Active Practitioner): Current, hands-on experience in defining verification architectures and building verification environments.
  2. Communication & Bus Protocols: Deep technical knowledge of AXI4, PCIe, Ethernet, UART, and ARINC standards.
  3. Process Assurance: DO-254 (DAL A/B) or comparable safety standards
  4. Mentoring & Pedagogy: Ability to explain complex concepts clearly and upskill a team.
  5. Tool Mastery: Advanced user of Siemens-Questasim/Synopsys-VCS/Cadence-Xcelium/Rivera-PRO.
  6. Automation: Capable of developing Python/TCL scripts to optimize the verification flow.
  7. Project Stewardship: Ability to balance technical execution with planning and reporting.

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