Test Engineer ( ICT Engineer)

Duties of Position: (Include specific duties and responsibilities)

1. ICT Test Program Development

• Coding & Debugging: Developing test sequences using platforms like Teradyne/(GenRad)
• Component Characterization: Defining the expected electrical values and tolerances for Electronic Component on the board.
• Cycle_Time Reduction: Optimizing the code to reduce test time, which is crucial for high-volume manufacturing.
• CAD Translation: Converting CB design files into wiring maps for the test fixture.

2. ICT Fixture Design and Management

• Fixture Specification: Designing the layout of spring-loaded test probes to hit specific "test points" on the PCB.
• Strain Analysis: Ensuring the pressure from hundreds of probes doesn't bend or crack the circuit board.
• GR&R (Gage Repeatability and Reproducibility): Running statistical tests to prove that the test equipment is accurate and consistent.
• Maintenance: Periodically cleaning and replacing worn-out probes to prevent "false failures."

3. Design for Test (DFT) Feedback

• Early Intervention: Reviewing early CB layouts to ensure there are sufficient test coverage - space available to place test points.
• Accessibility Reports: Reporting back to the design team, on availability of Test Point/Pads with access Qualifications Required: (Education, experience, skills, etc. Please be specific)

1. Bachelor's Degree in Electrical Engineering, Electronics Engineering, or Mechatronics
2. Proficiency in major ICT systems: Minimum 2 year or more experience with Keysight (Agilent) 3070, Teradyne (GenRad) TestStation.
3. Schematic Literacy: Ability to read complex PCB schematics and understand the function of electronic component
4. Scripting: Knowledge of Python, C/C++, or Perl for automating data collection and creating custom test subroutines.
5. Proprietary Languages: Mastering the specific "test languages" used by machines (e.g.,
   Keysight's BT-Basic).
6. CAD/CAM Tools: Familiarity with tools like Fabmaster or Vayo used to translate PCB layout files into test programs.
7. Knowledge in JAG/Boundary Scan will be advantage