Verification Team Leader

At our Holon site, we are looking for a Verification Team Leader to lead a team of Verification Engineers within our advanced FPGA Systems Development Group.

This role combines technological leadership, team management, and hands-on technical work, with responsibility for defining the verification strategy, establishing verification methodologies, driving AI adoption within the verification environment, and leading the verification process throughout the entire development lifecycle.

Key Responsibilities Lead a team of experienced Verification Engineers

Lead the development of UVM-based verification environments for complex FPGA systems

Drive the end-to-end verification process, from requirements definition through signoff, at both Block-Level and System-Level

Work closely with Design, Architecture, Algorithm, System Engineering, and Integration teams

Define and lead verification strategies, automation initiatives, and continuous improvement of verification methodologies

Introduce and implement AI-driven workflows and tools within the verification environment

Manage multiple projects simultaneously, prioritize tasks, and ensure successful execution against development objectives and schedules

Requirements B.Sc. in Electrical Engineering, Computer Science, or a related field

At least 8 years of experience in Verification Engineering

Strong hands-on experience with SystemVerilog and UVM methodologies

Proven experience leading Verification teams

Experience performing verification from Block-Level through System-Level

Broad system-level perspective and strong understanding of FPGA development processes

Ability to manage multiple projects and priorities in a dynamic environment

Excellent leadership, communication, and presentation skills

Fast learner with the ability to adopt new technologies and methodologies

*Only suitable candidates will be contacted

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