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Wireless RFIC Analog Circuit Design Engineer (PLL/XO)

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Onsite

Wireless RFIC Analog Circuit Design Engineer (PLL/XO)

MediaTek

Wireless RFIC Analog Circuit Design Engineer (PLL/XO)

2 months ago

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Important information


Contract type:

Permanent

Location:

Hsinchu, North District, Hsinchu City, Taiwan

Work mode:

Onsite

Published on:

3 September 2026

What they need


  • Wireless RFIC analog circuit design. 2. Frequency synthesizer, phase-locked loop, voltage-controlled oscillator, crystal oscillator design, frequency divider, etc.

Main Requirements and Qualifications

    1. MS or above with major in EE or Telecommunication Engineering related field.
    1. Familiar with operation principles of RF frequency synthesizer and phase-locked loop.
    1. Excellent working attitude and good interpersonal and communication skills.

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