Cpu Design Verification - Principal Engineer

Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement.

Responsibilities

• Responsible for power management verification, including boot, reset, clock gating, power gating, voltage/frequency management, limit management, and throttling.
• Work closely with design/verification teams within CPU to develop a comprehensive test plan.
• Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions, and develop stimulus.
• Verify power intent through the use of methodologies like UPF.
• Work closely with system architects, software teams and SoC teams to validate system use cases.
• Work closely with emulation team to enable verification on emulators and FPGA platforms.
• Debug and triage failures in simulation, emulation, and silicon.
• BE/BTech degree in CS/EE with 4+ years of experience.
• Experience in power management verification.
• Implementation of assembly and C language embedded firmware.
• Experience in C/C++, scripting languages, and Verilog/SystemVerilog.
• Strong understanding of power management features in CPUs and CPU-based SoCs.
• Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling, etc.

Preferred Requirements

• Good understanding of CPU architectures and CPU micro-architectures.
• In-depth knowledge of digital logic design, micro-processor, debug features, and DFT architecture and microarchitecture.
• Experience with advanced verification techniques such as formal methods and assertions is a plus.
• Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus.