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Rfic Digital Verification Engineer

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Onsite

Rfic Digital Verification Engineer

Qualcomm

Rfic Digital Verification Engineer

Skills

PythonMATLAB

2 months ago

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Important information


Contract type:

Permanent

Location:

Bengaluru, Karnataka, India

Work mode:

Onsite

Published on:

25 August 2026

What they need


Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > Hardware Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Responsibilities

Successful candidates will be working on the following:

  • Block/Subsystem/SoC level digital verification using constrained-random coverage methodologies at RTL and Gate Level.
  • The skills involved includes SV/UVM/UVM_RAL/Randomization/Coverage/SVA.

Preferred Qualifications

  • Experience in writing Test Plans independently
  • Experience in writing/updating Verification Testbench
  • Experience with debugging RTL Gate level simulations
  • Experience with Functional Coverage Code Coverage
  • Experience with Scripting in Perl, Python, TCL
  • Experience in planning Verification architecture, review testbench/ testplans with juniors, identify coverage gaps, propose alternate methods for coverage
  • Should have been involved in leading a chip DV effort
  • Should have been self-driven and quick learner
  • Experience with Power aware(UPF) verification and debugs is plus
  • Silicon Debug Experience a plus.
  • Experience with Mixed Signal Designs involving DSP a plus
  • Modeling Experience with Matlab, Octave a plus

Minimum Qualifications

  • Required: Bachelor's, Electronics or EE
  • Preferred: Master's, VLSI, Electronics or EE.
  • 1 to 3 years ASIC design, verification, or related work experience

Job Families for Job Profiles

Hardware Engineering

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