Post Silicon Validation Engineer

Job Title: Post Silicon Validation Engineer

Location: Sunnyvale, CA

Compensation: $120K-$150K annually, including 10% QPLC

We are looking for candidates with strong experience in Display/SOC Validation , with particular emphasis on the following skills:

Key Requirements

• Strong Post-Silicon Validation experience, preferably in the Display domain
• Hands-on experience with SOC, Mixed-Signal SOC, or IP validation
• Strong Embedded C/C++ coding experience
• Hands-on Emulation experience using platforms such as Zebu or HAPS
• Experience with ARM architecture/processors
• Strong SOC validation and silicon bring-up experience
• Experience with Python for validation automation and data collection
• Experience with SW stack validation, workload enablement, and debugging
• Performance and power characterization experience
• Ability to track test coverage, debug silicon issues, and drive cross-functional resolution
• Experience collaborating with factory test teams for production characterization

Important: ML-coprocessor experience is not required . Strong Display domain experience is more important.

Have a Great Day!

Warm Regards,

Sania Wadhwa Technical Recruiter Contact Details: 609-755-5388 Email: [email protected] 4365 Route 1 South, Suite 105 Princeton, NJ 08540 www.applabsystems.com