豪威集团
CD003-数字电路后端设计工程师(J11826)
Skills
2 months ago
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Important information
Contract type:
Permanent
Location:
Chengdu, Sichuan, China
Work mode:
Onsite
Published on:
13 August 2026
What they need
该职位来源于猎聘 职责描述： 1.负责全芯片或数字模块的布局布线部分 2.负责全芯片或数字模块的时钟树生成和时序优化及验证 3.负责全芯片或数字模块的物理验证包括DRC, LVS, ANT, LVL, RTO等 4.负责全芯片或数字模块的电压降分析 任职要求： 1.扎实的数字电路基础知识，熟悉计算机体系结构 2.熟练掌握C/C++，Python，Perl，TCL等其中一种或多种编程语言 3.了解Verilog硬件设计语言，了解集成电路设计的基本流程和概念 4.良好的英语书面和口头表达能力
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