济南齐芯电子有限公司
CPU IP 设计工程师
2 months ago
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Important information
Contract type:
Permanent
Location:
Shanghai, China
Work mode:
Onsite
Published on:
20 August 2026
What they need
该职位来源于猎聘 职位描述：
- CPU IP的微架构和RTL设计
- CPU IP的PPA优化 3. 与验证团队合作完成IP验证工作
- CPU IP release文档的编写 职位要求
- 3年以上CPU IP相关设计经验 2. 精通Verilog/SytemVerilog RTL coding，熟练使用EDA仿真及调试工具 3. 精通CPU的微架构，包括: instruction fetch, decoder, issue, execution (in-order/Out-of-Order) , LSU, cache subsystem and cache coherence 4. 熟悉CHI/ACE/AXI/AHB/APB等接口协议 5. 有量产CPU IP项目经验优先 6. 有ARM和RISC-V CPU IP设计经验优先 7. 有高性能CPU IP设计经验优先
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