瑞昱半導體股份有限公司
SoC整合數位IC設計工程師
8 months ago
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Important information
Location:
Taiwan
Work mode:
Onsite
Published on:
25 September 2026
What they need
Location : 新竹科學園區
Work experience : 2 year
Education : 碩士
工作項目：
Design block integration / clcok-gen structure design / synthesis / timing analysis / LEC / scan-insert.
應徵條件：
碩士以上; 電機工程、電信工程、電子工程、資訊科學等相關科系畢業為主。
具2年以上 SoC整合或 synthesis/sta等相關經驗者為佳。
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