Jaymin Patel

Firmware Engineer

Salaire / Taux journalier

Braga, Portugal

Mobilité : Paris, Nice, ...

Freelance, ouvert au CDI

Peut venir sur site

Expertises

HardwareC#ESP32

Langues

Anglais (Maternelle)Hindi (Maternelle)Gujarati (Maternelle)Portugais

À propos

Liens

Expérience de travail

Embedded Software Engineer

Critical Software

juin 2025 - déc. 2025

7 mois

Porto, Portugal

Research Engineer

INL - International Iberian Nanotechnology Laboratory

mars 2021 - mars 2025

4 ans 1 mois

Design, develop, debug, and deploy low-level embedded (resource-constrained, time-critical) bare-metal applications and multi-threaded RTOS applications on various MCU architectures such as ARM, ESP32, AVR, Microchip, and Raspberry Pi Pico-RP2040.

Firmware Engineer

DSR Corporation

avr. 2019 - mars 2021

2 ans

Zigbee application layer development. PikeOS development

Researcher

Instituto de Telecomunicações

juin 2018 - déc. 2018

7 mois

Design and implementation of receiver in VHDL used for protocol in research.

Senior Engineer

PureSoftware Ltd

janv. 2018 - mai 2018

5 mois

ARM open source software development; jnr-ffi porting for A64 architecture.

Landis+Gyr

juil. 2013 - janv. 2018

4 ans 7 mois

Firmware Engineer

juil. 2014 - janv. 2018

3 ans 7 mois

RF radio firmware stack development, MAC layer and above.

Intern

juil. 2013 - juil. 2014

1 an 1 mois


Formation

Gujarat Technological University

Bachelor of Technology, Electronics and Communications Engineering

Built a strong foundation in electronics, communication systems, and embedded technology. Specialized in RTOS, advanced microprocessors, and microcontrollers, with a focus on real-time systems and hardware-software co-design.

Shiv Nadar University

Master of Technology, Electronics - VLSI

Coursework covered advanced analogue and digital VLSI design, including high-performance OP-AMP circuits and IC fabrication techniques. STMicroelectronics Summer Programme: Gained hands-on experience in memory architecture and design like Flash and SRAM, SoC verification and high-speed circuit simulation. Designed and simulated a 6T SRAM cell, optimising for speed and power efficiency across extreme temperature conditions.

Le meilleur endroit pour trouver votre prochaine opportunité

© 2026. Tous droits réservés.