Oussama ABASSI

Skills: UVM · SystemVerilog · SVA· Portals MPI protocol· Polarion· Intel Quartus, Questasim, Sypglass.

VHDL, FPGAs Xilinx, Time Sensitive Networks.

VHDL, Verilog, C/C++, ARM Cortex-A5 integration and verification, gtkwave, Jenkins, Cadence tools: Xcelium, JasperGold, Conformal, Genus.

Ethernet systems for criticial real-time industrial applications, TSN , VHDL, Verilog, Intel Arria-10 FPGA, C programming, Intel Quartus, Modelsim.

RTL development for Intel Arria-10 FPGA-based video systems, VHDL, Verilog, C programming, HDMI, SMPTE SDI, Riviera-Pro, Intel Quartus.

RTL development for Intel Arria-10 FPGA-based video systems, VHDL, Verilog, C programming, HDMI, SMPTE SDI

Functional verification of a multi-core ARM Cortex A53 system. Verilog, SystemVerilog, UVM, Questa VIPs, Questasim.

Study of non-binary LDPC decoding and high-order modulations: algorithms and architectures.

Visual C++ GUI interface development for Synopsys Chip-it FPGA-based emulator platform.

VHDL development of a non-binary LDPC decoder for the European DAVINCI research project.